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low cost 270 mhz differential receiver amplifiers ad8129/ad8130 rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2005 analog devices, inc. all rights reserved. features high speed ad8130: 270 mhz, 1090 v/s @ g = +1 ad8129: 200 mhz, 1060 v/s @ g = +10 high cmrr 94 db min, dc to 100 khz 80 db min @ 2 mhz 70 db @ 10 mhz high input impedance: 1 m differential input common-mode range 10.5 v low noise ad8130: 12.5 nv/hz ad8129: 4.5 nv/hz low distortion, 1 v p-p @ 5 mhz ad8130, ?79 dbc worst harmonic @ 5 mhz ad8129, ?74 dbc worst harmonic @ 5 mhz user-adjustable gain no external components for g = +1 power supply range +4.5 v to 12.6 v power-down applications high speed differential line receivers differential-to-single-ended converters high speed instrumentation amps level shifting connection diagram ad8129/ ad8130 1 2 3 4 +in ?in ? v s +v s pd out ref fb 8 7 6 5 + 02464-001 figure 1. the ad8129/ad8130 are differential-to-single-ended amplifiers with extremely high cmrr at high frequency. therefore, they can also be effectively used as high speed instrumentation amps or for converting differential signals to single-ended signals. the ad8129 is a low noise, high gain (10 or greater) version intended for applications over very long cables, where signal attenuation is significant. the ad8130 is stable at a gain of 1 and can be used for applications where lower gains are required. both have user-adjustable gain to help compensate for losses in the transmission line. the gain is set by the ratio of two resistor values. the ad8129/ad8130 have very high input impedance on both inputs, regardless of the gain setting. general description the ad8129/ad8130 are designed as receivers for the transmission of high speed signals over twisted-pair cables to work with the ad8131 or ad8132 drivers. either can be used for analog or digital video signals and for high speed data transmission. 120 110 100 90 80 70 60 50 40 30 10k 100k 1m 10m 100m frequency (hz) cmrr (db) 02464-002 figure 2. ad8129 cmrr vs. frequency the ad8129/ad8130 have excelle nt common-mode rejection (70 db @ 10 mhz), allowing the use of low cost, unshielded twisted-pair cables without fear of corruption by external noise sources or crosstalk. the ad8129/ad8130 have a wide power supply range from single +5 v to 12 v, allowing wide common- mode and differential-mode voltage ranges while maintaining signal integrity. the wide common-mode voltage range enables the driver-receiver pair to operate without isolation transformers in many systems where the ground potential difference between drive and receive locations is many volts. the ad8129/ad8130 have considerable cost and performance improvements over op amps and other multiamplifier receiving solutions. r f v out v in r g v out =v in [1+(r f /r g )] pd +v s ?v s 1 8 4 5 3 2 7 6 02464-003 figure 3. typical connection configuration
important links for the ad8129_8130 * last content update 08/23/2013 05:14 pm parametric selection tables find similar products by operating parametersfor the ad8129 find similar products by operating parametersfor the ad8130 amplifiers for video distribution high speed amplifiers selection table documentation an-692: universal precision op amp evaluation board an-649: using the analog devices active filter design tool an-358: noise and operational amplifier circuits ug-133: differential receiver evaluation boards for amplifiers ad8129 and ad8130 offered in 8-lead soic and msop packages adjustable cable equalizer combines wideband differential receiver with analog switches video amplifier products for the ad8129 an-356: users guide to applying and measuring operational amplifier specifications an-257: careful design tames high speed op amps an-253: find op amp noise with spreadsheet an-202: an ic amplifier users guide to decoupling, grounding, and making things go right for a change a designers guide to instrumentation amplifiers (3rd edition) for the ad8130 an-1214: high cmrr circuit for converting wideband complementary dac output to single-ended without precision resistors an-584: using the ad813x differential amplifier security and surveillance applications booklet security and surveillance applications technical presentation evaluation kits & symbols & footprints view the evaluation boards and kits page for thee ad8129 view the evaluation boards and kits page for thee ad8130 symbols and footprints for the ad8129 symbols and footprints for the ad8130 design tools, models, drivers & software analog filter wizard 2.0 ad8130 spice macro-model design collaboration community collaborate online with the adi support team and other designers about select adi products. follow us on twitter: www.twitter.com/adi_news like us on facebook: www.facebook.com/analogdevicesinc design support submit your support request here: linear and data converters embedded processing and dsp telephone our customer interaction centers toll free: americas: 1-800-262-5643 europe: 00800-266-822-82 china: 4006-100-006 india: 1800-419-0108 russia: 8-800-555-45-90 quality and reliability lead(pb)-free data sample & buy ad8129 ad8130 view price & packaging request evaluation board request samples check inventory & purchase find local distributors * this page was dynamically generated by analog devices, inc. and inserted into this data sheet. note: dynamic changes to the content on this page (labeled 'important links') does not constitute a change to the revision number of the product data sheet. this content may be frequently modified. powered by tcpdf (www.tcpdf.org)
ad8129/ad8130 rev. c | page 2 of 40 table of contents features .............................................................................................. 1 applications....................................................................................... 1 connection diagram ....................................................................... 1 general description ......................................................................... 1 revision history ............................................................................... 2 ad8129/ad8130 specifications..................................................... 3 5 v specifications ......................................................................... 3 5 v specifications....................................................................... 5 12 v specifications..................................................................... 7 absolute maximum ratings............................................................ 9 thermal resistance ...................................................................... 9 esd caution.................................................................................. 9 typical performance characteristics ........................................... 10 ad8130 frequency response characteristics........................ 10 ad8129 frequency response characteristics........................ 13 ad8130 harmonic distortion characteristics ...................... 16 ad8129 harmonic distortion characteristics ...................... 18 ad8130 transient response characteristics.......................... 23 ad8129 transient response characteristics.......................... 26 theory of operation ...................................................................... 32 op amp configuration ............................................................. 32 applications..................................................................................... 33 basic gain circuits..................................................................... 33 twisted-pair cable, composite video receiver with equalization using an ad8130................................................... 33 output offset/level translator ................................................ 34 resistorless gain of 2 ................................................................. 35 summer ....................................................................................... 35 cable-tap amplifier .................................................................. 35 power-down ............................................................................... 36 extreme operating conditions ................................................ 36 power dissipation....................................................................... 37 layout, grounding, and bypassing.......................................... 38 outline dimensions ....................................................................... 39 ordering guide .......................................................................... 40 revision history 11/05rev. b to rev. c changes to 5 v specifications......................................................... 3 changes to table 4 and maximum power dissipation section.. 9 changes to figure 16...................................................................... 11 changes to figure 17...................................................................... 12 9/05rev. a to rev. b extended temperature range...........................................universal deleted figure 5................................................................................ 5 added thermal resistance section ............................................... 9 updated outline dimensions ....................................................... 39 changes to ordering guide .......................................................... 40 3/05rev. 0 to rev. a changes to specifications.................................................................2 replaced figure 3 ..............................................................................5 changes to ordering guide .............................................................6 updated outline dimensions....................................................... 27 revision 0: initial version
ad8129/ad8130 rev. c | page 3 of 40 ad8129/ad8130 specifications 5 v specifications ad8129 g = +10, ad8130 g = +1, t a = 25c, +v s = 5 v, ?v s = 0 v, ref = 2.5 v, pd v ih , r l = 1 k, c l = 2 pf, unless otherwise noted. t min to t max = ?40c to +125c, unless otherwise noted. table 1. model ad8129 ad8130 parameter conditions min typ max min typ max unit dynamic performance ?3 db bandwidth v out 0.3 v p-p 160 185 220 250 mhz v out = 1 v p-p 160 185 180 205 mhz bandwidth for 0.1 db flatness v out 0.3 v p-p, soic/msop 25/40 25 mhz slew rate v out = 2 v p-p, 25% to 75% 810 930 810 930 v/s settling time v out = 2 v p-p, 0.1% 20 20 ns rise and fall times v out 1 v p-p, 10% to 90% 1.8 1.5 ns output overdrive recovery 20 30 ns noise/distortion second harmonic/third harmonic v out = 1 v p-p, 5 mhz ?68/?75 ?72/?79 dbc v out = 2 v p-p, 5 mhz ?62/?64 ?65/?71 dbc v out = 1 v p-p, 10 mhz ?63/?70 ?60/?62 dbc v out = 2 v p-p, 10 mhz ?56/?58 ?68/?68 dbc imd v out = 2 v p-p, 10 mhz ?67 ?70 dbc output ip3 v out = 2 v p-p, 10 mhz 25 26 dbm input voltage noise (rti) f 10 khz 4.5 12.3 nv/hz input current noise (+in, ?in) f 100 khz 1 1 pa/hz input current noise (ref, fb) f 100 khz 1.4 1.4 pa/hz differential gain error ad8130, g = +2, ntsc 100 ire, r l 150 0.3 0.13 % differential phase error ad8130, g = +2, ntsc 100 ire, r l 150 0.1 0.15 degrees input characteristics common-mode rejection ratio dc to 100 khz, v cm = 1.5 v to 3.5 v 86 96 86 96 db v cm = 1 v p-p @ 1 mhz 80 80 db v cm = 1 v p-p @ 10 mhz 70 70 db cmrr with v out = 1 v p-p v cm = 1 v p-p @ 1 khz, v out = 0.5 v dc 80 72 db common-mode voltage range v +in ? v ?in = 0 v 1.25 to 3.7 1.25 to 3.8 v differential operating range 0.5 2.5 v differential clipping level 0.6 0.75 0.85 2.3 2.8 3.3 v resistance differential 1 6 m common mode 4 4 m capacitance differential 3 3 pf common mode 4 4 pf
ad8129/ad8130 rev. c | page 4 of 40 model ad8129 ad8130 parameter conditions min typ max min typ max unit dc performance closed-loop gain error v out = 1 v, r l 150 0.25 1.25 0.1 0.6 % t min to t max 20 20 ppm/c open-loop gain v out = 1 v 86 71 db gain nonlinearity v out = 1 v 250 200 ppm input offset voltage 0.2 0.8 0.4 1.8 mv t min to t max 2 20 v/c t min to t max 1.4 3.5 mv input offset voltage vs. supply +v s = 5 v, ?v s = ?0.5 v to +0.5 v ?88 ?80 ?74 ?70 db ?v s = 0 v, +v s = +4.5 v to +5.5 v ?100 ?86 ?90 ?76 db input bias current (+in, ?in) 0.5 2 0.5 2 a input bias current (ref, fb) 1 3.5 1 3.5 a t min to t max (+in, ?in, ref, fb) 5 5 na/c input offset current (+in, ?in, ref, fb) 0.08 0.4 0.08 0.4 a t min to t max 0.2 0.2 na/c output performance voltage swing r load 150 1.1 3.9 1.1 3.9 v output current 35 35 ma short-circuit current to common ?60/+55 ?60/+55 ma t min to t max ?240 ?240 a/c output impedance pd v il , in power- down mode 10 10 pf power supply operating voltage range total supply voltage 2.25 12.6 2.25 12.6 v quiescent supply current 9.9 10.6 9.9 10.6 ma t min to t max 33 33 a/c pd v il 0.65 0.85 0.65 0.85 ma pd v il , t min to t max 1 1 ma pd pin v ih +v s ? 1.5 +v s ? 1.5 v v il +v s ? 2.5 +v s ? 2.5 v i ih pd = min v ih ?30 ?30 a i il pd = max v il ?50 ?50 a input resistance pd +v s ? 3 v 12.5 12.5 k pd +v s ? 2 v 100 100 k enable time 0.5 0.5 s operating temperature range ?40 +125 ?40 +125 c
ad8129/ad8130 rev. c | page 5 of 40 5 v specifications ad8129 g = +10, ad8130 g = +1, t a = 25c, v s = 5 v, ref = 0 v, pd v ih , r l = 1 k, c l = 2 pf, unless otherwise noted. t min to t max = ?40c to +125c, unless otherwise noted. table 2. ad8129 ad8130 parameter conditions min typ max min typ max unit dynamic performance ?3 db bandwidth v out 0.3 v p-p 175 200 240 270 mhz v out = 2 v p-p 170 190 140 155 mhz bandwidth for 0.1 db flatness v out 0.3 v p-p, soic/msop 30/50 45 mhz slew rate v out = 2 v p-p, 25% to 75% 925 1060 950 1090 v/s settling time v out = 2 v p-p, 0.1% 20 20 ns rise and fall times v out 1 v p-p, 10% to 90% 1.7 1.4 ns output overdrive recovery 30 40 ns noise/distortion second harmonic/third harmonic v out = 1 v p-p, 5 mhz ?74/?84 ?79/?86 dbc v out = 2 v p-p, 5 mhz ?68/?74 ?74/?81 dbc v out = 1 v p-p, 10 mhz ?67/?81 ?74/?80 dbc v out = 1 v p-p, 10 mhz ?61/?70 ?74/?76 dbc imd v out = 2 v p-p, 10 mhz ?67 ?70 dbc output ip3 v out = 2 v p-p, 10 mhz 25 26 dbm input voltage noise (rti) f 10 khz 4.5 12.5 nv/hz input current noise (+in, ?in) f 100 khz 1 1 pa/hz input current noise (ref, fb) f 100 khz 1.4 1.4 pa/hz differential gain error ad8130, g = +2, ntsc 200 ire, r l 150 0.3 0.13 % differential phase error ad8130, g = +2, ntsc 200 ire, r l 150 0.1 0.15 degrees input characteristics common-mode rejection ratio dc to 100 khz, v cm = ?3 v to +3.5 v 94 110 90 110 db v cm = 1 v p-p @ 2 mhz 80 80 db v cm = 1 v p-p @ 10 mhz 70 70 db cmrr with v out = 1 v p-p v cm = 2 v p-p @ 1 khz, v out = 0.5 v dc 100 83 db common-mode voltage range v +in ? v ?in = 0 v 3.5 3.8 v differential operating range 0.5 2.5 v differential clipping level 0.6 0.75 0.85 2.3 2.8 3.3 v resistance differential 1 6 m common mode 4 4 m capacitance differential 3 3 pf common mode 4 4 pf
ad8129/ad8130 rev. c | page 6 of 40 ad8129 ad8130 parameter conditions min typ max min typ max unit dc performance closed-loop gain error v out = 1 v, r l 150 0.4 1.5 0.15 0.6 % t min to t max 20 10 ppm/c open-loop gain v out = 1 v 88 74 db gain nonlinearity v out = 1 v 250 200 ppm input offset voltage 0.2 0.8 0.4 1.8 mv t min to t max 2 20 v/c t min to t max 1.4 3.5 mv input offset voltage vs. supply +v s = +5 v, ?v s = ?4.5 v to ?5.5 v ?90 ?84 ?78 ?74 db ?v s = ?5 v, +v s = +4.5 v to +5.5 v ?94 ?86 ?80 ?74 db input bias current (+in, ?in) 0.5 2 0.5 2 a input bias current (ref, fb) 1 3.5 1 3.5 a t min to t max (+in, ?in, ref, fb) 5 5 na/c input offset current (+in, ?in, ref, fb) 0.08 0.4 0.08 0.4 a t min to t max 0.2 0.2 na/c output performance voltage swing r load = 150 /1 k 3.6/4.0 3.6/4.0 v output current 40 40 ma short-circuit current to common ?60/+55 ?60/+55 ma t min to t max ?240 ?240 a/c output impedance pd v il , in power- down mode 10 10 pf power supply operating voltage range total supply voltage 2.25 12.6 2.25 12.6 v quiescent supply current 10.8 11.6 10.8 11.6 ma t min to t max 36 36 a/c pd v il 0.68 0.85 0.68 0.85 ma pd v il , t min to t max 1 1 ma pd pin v ih +v s ? 1.5 +v s ? 1.5 v v il +v s ? 2.5 +v s ? 2.5 v i ih pd = min v ih ?30 ?30 a i il pd = max v il ?50 ?50 a input resistance pd +v s ? 3 v 12.5 12.5 k pd +v s ? 2 v 100 100 k enable time 0.5 0.5 s operating temperature range ?40 +125 ?40 +125 c
ad8129/ad8130 rev. c | page 7 of 40 12 v specifications ad8129 g = +10, ad8130 g = +1, t a = 25c, v s = 12 v, ref = 0 v, pd v ih , r l = 1 k, c l = 2 pf, unless otherwise noted. t min to t max = ?40c to +85c, unless otherwise noted. table 3. ad8129 ad8130 parameter conditions min typ max min typ max unit dynamic performance ?3 db bandwidth v out 0.3 v p-p 175 200 250 290 mhz v out = 2 v p-p 170 195 150 175 mhz bandwidth for 0.1 db flatness v out 0.3 v p-p, soic/msop 50/70 110 mhz slew rate v out = 2 v p-p, 25% to 75% 935 1070 960 1100 v/s settling time v out = 2 v p-p, 0.1% 20 20 ns rise and fall times v out 1 v p-p, 10% to 90% 1.7 1.4 ns output overdrive recovery 40 40 ns noise/distortion second harmonic/third harmonic v out = 1 v p-p, 5 mhz ?71/?84 ?79/?86 dbc v out = 2 v p-p, 5 mhz ?65/?74 ?74/?81 dbc v out = 1 v p-p, 10 mhz ?65/?82 ?74/?80 dbc v out = 2 v p-p, 10 mhz ?59/?70 ?74/?74 dbc imd v out = 2 v p-p, 10 mhz ?67 ?70 dbc output ip3 v out = 2 v p-p, 10 mhz 25 26 dbm input voltage noise (rti) f 10 khz 4.6 13 nv/hz input current noise (+in, ?in) f 100 khz 1 1 pa/hz input current noise (ref, fb) f 100 khz 1.4 1.4 pa/hz differential gain error ad8130, g = +2, ntsc 200 ire, r l 150 0.3 0.13 % differential phase error ad8130, g = +2, ntsc 200 ire, r l 150 0.1 0.2 degrees input characteristics common-mode rejection ratio dc to 100 khz, v cm = 10 v 92 105 88 105 db v cm = 1 v p-p @ 2 mhz 80 80 db v cm = 1 v p-p @ 10 mhz 70 70 db cmrr with v out = 1 v p-p v cm = 4 v p-p @ 1 khz, v out = 0.5 v dc 93 80 db common-mode voltage range v +in ? v Cin = 0 v 10.3 10.5 v differential operating range 0.5 2.5 v differential clipping level 0.6 0.75 0.85 2.3 2.8 3.3 v resistance differential 1 6 m common mode 4 4 m capacitance differential 3 3 pf common mode 4 4 pf
ad8129/ad8130 rev. c | page 8 of 40 ad8129 ad8130 parameter conditions min typ max min typ max unit dc performance closed-loop gain error v out = 1 v, r l 150 0.8 1.8 0.15 0.6 % t min to t max 20 10 ppm/c open-loop gain v out = 1 v 87 73 db gain nonlinearity v out = 1 v 250 200 ppm input offset voltage 0.2 0.8 0.4 1.8 mv t min to t max 2 20 v/c t min to t max 1.4 3.5 mv input offset voltage vs. supply +v s = +12 v, ?v s = C11.0 v to ?13.0 v ?88 ?82 ?77 ?70 db ?v s = ?12 v, +v s = +11.0 v to +13.0 v ?92 ?84 ?88 ?70 db input bias current (+in, ?in) 0.25 2 0.25 2 a input bias current (ref, fb) 0.5 3.5 0.5 3.5 a t min to t max (+in, ?in, ref, fb) 2.5 2.5 na/c input offset current (+in, ?in, ref, fb) 0.08 0.4 0.08 0.4 a t min to t max 0.2 0.2 na/c output performance voltage swing r load = 700 10.8 10.8 v output current 40 40 ma short-circuit current to common ?60/+55 ?60/+55 ma t min to t max ?240 ?240 a/c output impedance pd v il , in power- down mode 10 10 pf power supply operating voltage range total supply voltage 2.25 12.6 2.25 12.6 v quiescent supply current 13 13.9 13 13.9 ma t min to t max 43 43 ac pd v il 0.73 0.9 0.73 0.9 ma pd v il , t min to t max 1.1 1.1 ma pd pin v ih +v s ? 1.5 +v s ? 1.5 v v il +v s ? 2.5 +v s ? 2.5 v i ih pd = min v ih ?30 ?30 a i il pd = max v il ?50 ?50 a input resistance pd +v s ? 3 v 3 3 k pd +v s ? 2 v 100 100 k enable time 0.5 0.5 s operating temperature range ?40 +85 ?40 +85 c
ad8129/ad8130 rev. c | page 9 of 40 absolute maximum ratings table 4. parameter rating supply voltage 26.4 v power dissipation refer to figure 4 input voltage (any input) ?v s ? 0.3 v to +v s + 0.3 v differential input voltage (ad8129) v s 11.5 v 0.5 v differential input voltage (ad8129) v s < 11.5 v 6.2 v differential input voltage (ad8130) 8.4 v storage temperature range ?65c to +150c lead temperature (soldering, 10 sec) 300c junction temperature 150c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, ja is specified for the device soldered in a circuit board in still air. table 5. thermal resistance package type ja unit 8-lead soic/4-layer 121 c/w 8-lead msop/4-layer 142 c/w maximum power dissipation the maximum safe power dissipation in the ad8129/ad8130 packages is limited by the associated rise in junction temp- erature (t j ) on the die. at approximately 150c, which is the glass transition temperature, the plastic changes its properties. even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ad8129/ad8130. exceeding a junction temperature of 150c for an extended period can result in changes in the silicon devices, potentially causing failure. the power dissipated in the package (p d ) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive. the quiescent power is the voltage between the supply pins (v s ) times the quiescent current (i s ). the power dissipated due to the load drive depends upon the particular application. the power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. rms voltages and currents must be used in these calculations. airflow reduces ja . in addition, more metal directly in contact with the package leads from metal traces through holes, ground, and power planes reduces the ja . figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 8-lead soic (121c/w) and msop ( ja = 142c/w) packages on a jedec standard 4-layer board. ja values are approximations. ambient temperature (c) maximum power dissipation (w) 1.75 1.50 1.00 1.25 0.50 0.25 0.75 0 ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 70 80 90 100 110 120 soic msop 02464-005 figure 4. maximum power dissipation vs. temperature esd caution esd (electrostatic discharge) sensitive device. electros tatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge wi thout detection. although this product features proprietary esd protection circuitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd pr ecautions are recommended to avoid performance degradation or loss of functionality.
ad8129/ad8130 rev. c | page 10 of 40 typical performance characteristics ad8130 frequency response characteristics g = +1, r l = 1 k, c l = 2 pf, v out = 0.3 v p-p, t a = 25c, unless otherwise noted. gain (db) 3 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 frequency (mhz) 1 10 100 400 02464-006 v out = 0.3v p-p v s = 2.5v v s = 12v v s = 5v figure 5. ad8130 frequency response vs. supply, v out = 0.3 v p-p frequency (mhz) gain (db) 3 1 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 10 100 300 02464-007 v s = 2.5v v s = 12v v s = 5v v out = 1v p-p figure 6. ad8130 frequency response vs. supply, v out = 1 v p-p frequency (mhz) gain (db) 1 ?3 ?4 ?5 ?6 ?7 ?2 ?1 10 100 300 3 0 1 2 02464-008 v out = 2v p-p v s = 2.5v v s = 12v v s = 5v figure 7. ad8130 frequency response vs. supply, v out = 2 v p-p frequency (mhz) gain (db) 6 1 3 0 ?1 ?2 ?3 ?4 1 2 4 5 10 100 300 02464-009 c l = 2pf v s = 5v c l = 20pf c l = 10pf c l = 5pf figure 8. ad8130 frequency response vs. load capacitance frequency (mhz) gain (db) 0.7 1 0.4 0.1 0 ?0.1 ?0.2 ?0.3 0.2 0.3 0.5 0.6 10 100 300 02464-010 v s = 2.5v v s = 12v v s = 5v r l = 1k figure 9. ad8130 fine scale response vs. supply, r l = 1 k frequency (mhz) gain (db) 0.5 1 0.2 ?0.1 ?0.2 ?0.3 ?0.4 ?0.5 0 0.1 0.3 0.4 10 100 300 02464-011 v s = 2.5v v s = 12v v s = 5v r l = 150 figure 10. ad8130 fine scale response vs. supply, r l = 150
ad8129/ad8130 rev. c | page 11 of 40 frequency (mhz) gain (db) 3 1 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 10 100 400 02464-012 v s = 2.5v v s = 12v v s = 5v r l = 150 figure 11. ad8130 frequency response vs. supply, r l = 150 frequency (mhz) gain (db) 3 1 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 10 100 300 02464-013 v s = 2.5v v s = 12v v s = 5v g = +2 v out = 0.3v p-p figure 12. ad8130 frequency response vs. supply, g = +2, v out = 0.3 v p-p frequency (mhz) gain (db) 3 1 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 10 100 300 02464-014 v s = 2.5v v s = 12v v s = 5v g = +2 v out = 2v p-p figure 13. ad8130 frequency response vs. supply, g = +2, v out = 2 v p-p frequency (mhz) gain (db) 3 1 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 10 100 300 02464-015 r f = r g = 1k r f = r g = 750 r f = r g = 499 r f = r g = 250 g = +2 v s = 5v figure 14. ad8130 frequency response for various r f /r g frequency (mhz) gain (db) 0.3 1 10 100 0 ?0.3 ?0.4 ?0.5 ?0.6 ?0.7 ?0.2 ?0.1 0.1 0.2 02464-016 v s = 2.5v v s = 12v v s = 5v g = +2 r l = 1k figure 15. ad8130 fine scale response vs. supply, g = +2, r l = 1 k frequency (mhz) gain (db) 0.3 11 0 0 ?0.3 ?0.4 ?0.5 ?0.6 ?0.7 ?0.2 ?0.1 0.1 0.2 1 0 0 02464-017 v s =2.5v v s =12v v s =5v g=+2 r l = 150 figure 16. ad8130 fine scale response vs. supply, g = +2, r l = 150
ad8129/ad8130 rev. c | page 12 of 40 frequency (mhz) gain (db) 3 1 300 10 100 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 02464-018 v s = 2.5v v s =12v v s =5v g=+2 r l = 150 frequency (mhz) gain (db) 3 1 10 100 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 0.1 02464-021 v s = 2.5v r l = 150 v s = 5v, 12v g = +10 g = +5 v s = 5v, 12v figure 17. ad8130 frequency response vs. supply, g = +2, r l = 150 figure 20. ad8130 frequency response vs. supply, g = +5, g = +10, r l = 150 frequency (mhz) gain (db) 0.3 0.1 0 ?0.3 ?0.4 ?0.5 ?0.6 ?0.7 ?0.2 ?0.1 0.1 0.2 11 0 frequency (mhz) output voltage (dbv) 12 10 6 0 ?6 ?12 ?18 ?24 ?30 ?36 ?42 ?48 100 400 0db = 1v rms 02464-022 v s = 5v 3 0 02464-019 v out = 2v p-p v s = 2.5v v s = 12v v s = 5v v s = 5v, 12v v s = 2.5v g = +10 g = +5 figure 18. ad8130 fine scale response vs. supply, g = +5, g = +10, v out = 2 v p-p figure 21. ad8130 frequency resp onse for various output levels frequency (mhz) gain (db) 3 1 10 100 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 0.1 02464-020 v out = 2v p-p v s = 12v v s = 5v, 12v v s = 2.5v g = +10 g = +5 02464-023 1 8 4 5 6 tek p6245 fet probe r l c l r g r f 50 g 1 2 5 10 r f 0 499 8.06k 4.99k r g ? 499 2k 549 figure 19. ad8130 frequency response vs. supply, g = +5, g = +10, v out = 2 v p-p figure 22. ad8130 basic freq uency response test circuit
ad8129/ad8130 rev. c | page 13 of 40 ad8129 frequency response characteristics g = +10, r l = 1 k, c l = 2 pf, v out = 0.3 v p-p, t a = 25c, unless otherwise noted. frequency (mhz) gain (db) 3 1 300 10 100 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 02464-024 v out = 0.3v p-p v s = 2.5v v s = 12v v s = 5v figure 23. ad8129 frequency response vs. supply, v out = 0.3 v p-p frequency (mhz) gain (db) 3 1 300 10 100 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 02464-025 v s = 2.5v v s = 12v v s = 5v v out = 1v p-p figure 24. ad8129 frequency response vs. supply, v out = 1 v p-p frequency (mhz) gain (db) 1 ?3 ?4 ?5 ?6 ?7 ?2 ?1 10 100 300 3 0 1 2 02464-026 v out = 2v p-p v s = 2.5v v s = 12v v s = 5v figure 25. ad8129 frequency response vs. supply, v out = 2 v p-p frequency (mhz) gain (db) 4 1 1 ?2 ?3 ?4 ?5 ?6 ?1 0 2 3 10 100 300 02464-027 v s = 5v c l = 20pf c l = 10pf c l = 5pf c l = 2pf figure 26. ad8129 frequency response vs. load capacitance 02464-028 frequency (mhz) gain (db) 0.5 0.2 ?0.1 ?0.2 ?0.3 ?0.4 ?0.5 0 0.3 0.4 1 300 10 100 r l = 1k v s = 2.5v v s = 5v v s = 12v 0.1 figure 27. ad8129 fine scale response vs. supply, r l = 1 k 02464-029 frequency (mhz) gain (db) 300 10 100 0.3 0 ?0.3 ?0.4 ?0.5 ?0.6 ?0.7 ?0.2 ?0.1 0.1 0.2 1 r l = 150 v s = 2.5v v s = 5v v s = 12v figure 28. ad8129 fine scale response vs. supply, r l = 150
ad8129/ad8130 rev. c | page 14 of 40 02464-030 frequency (mhz) gain (db) 300 100 10 3 2 1 0 ?1 ?2 ?3 ?4 ?5 ?6 ?7 r l = 150 v s = 2.5v v s = 5v v s = 12v figure 29. ad8129 frequency response vs. supply, r l = 150 02464-031 frequency (mhz) gain (db) 300 100 1 3 2 1 0 ?1 ?2 ?3 ?4 ?5 ?6 ?7 g = +20 v out = 0.3v p-p v s = 5v, 12v v s = 2.5v 10 figure 30. ad8129 frequency response vs. supply, g = +20, v out = 0.3 v p-p 02464-032 frequency (mhz) gain (db) 300 100 1 3 2 1 0 ?1 ?2 ?3 ?4 ?5 ?6 ?7 10 g = +20 v out = 2v p-p v s = 2.5v v s = 5v, 12v figure 31. ad8129 frequency response vs. supply, g = +20, v out = 2 v p-p 02464-033 frequency (mhz) gain (db) 300 100 11 0 0.8 0.6 0.4 0.2 0 ?0.2 0.2 0 ?0.2 ?0.4 ?0.6 g = +10 v s = 5v 2k /221 909 /100 499 /54.9 2k /221 909 /100 499 /54.9 soic soic figure 32. ad8129 fine scale response vs. soic and msop for various r f /r g 02464-034 frequency (mhz) gain (db) 30 11 0 0.2 0.1 0 ?0.1 ?0.2 ?0.3 ?0.4 ?0.5 ?0.6 ?0.7 ?0.8 g = +20 r l = 1k v s = 2.5v v s = 5v v s = 12v figure 33. ad8129 fine scale response vs. supply 02464-035 frequency (mhz) gain (db) 30 11 0 0.1 0.3 0 ?0.3 ?0.4 ?0.5 ?0.6 ?0.7 ?0.2 ?0.1 0.1 0.2 g = +20 r l = 150 v s = 5v, 12v v s = 2.5v figure 34. ad8129 fine scale response vs. supply
ad8129/ad8130 rev. c | page 15 of 40 02464-036 frequency (mhz) gain (db) 1 300 10 100 3 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 v s = 5v, 12v v s = 2.5v g = +20 r l = 150 figure 35. ad8129 frequency response vs. supply, g = +20, r l = 150 02464-037 frequency (mhz) gain (db) 0.1 1 10 0.2 ?0.1 ?0.4 ?0.5 ?0.6 ?0.7 ?0.8 ?0.3 ?0.2 0 0.1 v s = 2.5v v s = 1 2 v v s = 1 2 v v s = 5v v out = 2v p-p g = + 5 0 g = + 1 0 0 figure 36. ad8129 fine scale response vs. supply, g = +50, g = +100, v out = 2 v p-p 02464-038 frequency (mhz) gain (db) 0.1 1 10 3 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 50 v out = 2v p-p g = + 1 0 0 g = + 5 0 v s = 2.5v v s = 5v v s = 1 2 v figure 37. ad8129 frequency response vs. supply, g = +50, g = +100, v out = 2 v p-p 02464-039 frequency (mhz) gain (db) 0.1 1 10 3 0 ?3 ?4 ?5 ?6 ?7 ?2 ?1 1 2 50 r l = 150 g = + 1 0 0 g = + 5 0 v s = 5v v s = 2.5v v s = 1 2 v figure 38. ad8129 frequency response vs. supply, g = +50, g = +100, r l = 150 02464-040 frequency (mhz) output voltage (dbv) 12 6 0 ?6 ?12 ?18 ?24 ?30 ?36 ?42 ?48 10 100 400 0db = 1v rms v s = 5v figure 39. ad8129 frequency resp onse for various output levels 1 8 4 5 6 r f r g tek p6245 fet probe 10 20 50 100 r f g 2k 2k 2k 2k 221 105 41.2 20 r l c l 50 02464-041 r g figure 40. ad8129 basic freq uency response test circuit
ad8129/ad8130 rev. c | page 16 of 40 ad8130 harmonic distortion characteristics r l = 1 k, c l = 2 pf, t a = 25c, unless otherwise noted. v s = 12v 02464-042 1 ?90 ?84 ?78 ?72 ?66 ?60 40 frequency (mhz) hd2 (dbc) 10 v out = 1v p-p g = +1 g = +2 v s = 12v v s = 5v figure 41. ad8130 second harmonic distortion vs. frequency g = +2 02464-043 1 ?84 ?78 ?72 ?66 ?60 ?54 40 frequency (mhz) hd2 (dbc) 10 v out = 2v p-p g = +1 v s = 5v v s = 12v v s = 5v g = +1 v s = 12v figure 42. ad8130 second harmonic distortion vs. frequency 02464-044 0.5 ?91 ?85 ?79 ?73 ?67 ?61 1 v out (v p-p) hd2 (dbc) 10 ?55 g = +2 f c = 5mhz g = +1 v s = 5v v s = 12v v s = 5v v s = 12v figure 43. ad8130 second harmonic distortion vs. output voltage 1 ?99 ?93 ?87 ?81 ?75 ?69 10 frequency (mhz) hd3 (dbc) 40 ?63 ?57 ?51 g = +1 v s = 5v v s = 5v g = +2 g = +1 g = +1 v s = 12v v out = 1v p-p v s = 12v 02464-045 figure 44. ad8130 third harmonic distortion vs. frequency 1 ?93 ?87 ?81 ?75 ?69 ?63 10 frequency (mhz) hd3 (dbc) 40 ?57 ?51 ?45 g = +1 02464-046 v out = 2v p-p g = +2 v s = 5v g = +2, v s = 12v g = +2, v s = 5v v s = 12v figure 45. ad8130 third harmonic distortion vs. frequency 02464-047 0.5 ?94 ?88 ?82 ?76 ?70 ?64 1 v out (v p-p) hd3 (dbc) 10 ?58 ?52 ?46 g = +1 f c = 5mhz v s = 12v v s = 5v g = +2 v s = 12v v s = 5v figure 46. ad8130 third harmonic distortion vs. output voltage
ad8129/ad8130 rev. c | page 17 of 40 02464-048 1 ?79 ?73 ?67 ?61 ?55 ?49 10 frequency (mhz) hd2 (dbc) 40 ?43 g = +1 v s = 2.5v g = +1 g = +2 g = +2 v out = 2v p-p v out = 1v p-p 02464-050 0 0.5 1.0 1.5 2.0 2.5 3.0 ?94 ?88 ?82 ?76 ?70 ?64 v out (v p-p) hd (dbc) ?58 ?52 ?46 v s = 2.5v f c = 5mhz g = +2, hd3 g = +2, hd3 g = +1, hd3 g = +1, hd2 g = +2, hd2 g = +2, hd2 figure 49. ad8130 harmonic distortion vs. output voltage figure 47. ad8130 second harmonic distortion vs. frequency 02464-049 1 ?96 ?90 ?84 ?78 ?72 ?66 10 frequency (mhz) hd3 (dbc) 40 ?60 ?54 ?48 ?42 v s = 2.5v v out = 2v p-p v out = 1v p-p g = +1 g = +2 g = +2 g = +1 figure 48. ad8130 third harmonic distortion vs. frequency
ad8129/ad8130 rev. c | page 18 of 40 ad8129 harmonic distortion characteristics r l = 1 k, c l = 2 pf, t a = 25c, unless otherwise noted. frequency (mhz) hd2 (dbc) ?51 1 ?57 ?63 ?69 ?75 ?81 ?87 10 40 v out = 1v p-p g = +10, v s = 12v g = +20, v s = 12v 02464-051 g = +10, v s = 5v g = +20, v s = 5v figure 50. ad8129 second harmonic distortion vs. frequency frequency (mhz) hd2 (dbc) ?42 1 ?48 ?54 ?60 ?66 ?72 ?78 10 40 v out = 2v p-p ?84 g = +10 g = +20 02464-052 g = +10, v s = 12v g = +20, v s = 12v g = +10, v s = 5v g = +20, v s = 5v figure 51. ad8129 second harmonic distortion vs. frequency v out (v p-p) hd2 (dbc) 1 10 ?62 ?68 ?74 ?80 ?86 ?56 ?50 f c = 5mhz 0.5 02464-053 g = +10, v s = 12v g = +20, v s = 12v g = +10, v s = 5v g = +20, v s = 5v figure 52. ad8129 second harmonic distortion vs. output voltage frequency (mhz) hd3 (dbc) 1 10 40 ?96 ?66 ?72 ?78 ?84 ?90 ?60 ?54 v out = 1v p-p 02464-054 g = +10, v s = 12v g = +20, v s = 12v g = +10, v s = 5v g = +20, v s = 5v figure 53. ad8129 third harmonic distortion vs. frequency frequency (mhz) hd3 (dbc) 1 ?45 ?51 ?57 ?63 ?69 ?75 ?81 ?87 10 40 v out = 2v p-p 02464-055 g = +10, v s = 12v g = +20, v s = 12v g = +10, v s = 5v g = +20, v s = 5v g = +10, v s = 12v g = +10, v s = 5v figure 54. ad8129 third harmonic distortion vs. frequency v out ( v p-p) ?48 ?84 0.5 ?54 ?60 ?66 ?72 ?78 11 0 f c = 5mhz ?90 ?96 hd3 (dbc) 02464-056 g = +20, v s = 12v g = +20, v s = 5v g = +10, v s = 12v g = +10, v s = 5v figure 55. ad8129 third harmonic distortion vs. output voltage
ad8129/ad8130 rev. c | page 19 of 40 frequency (mhz) hd2 (dbc) 1 ?44 ?50 ?56 ?62 ?68 ?74 ?80 10 40 v s = 2.5v g = +20 g = +10 v out = 1v p-p 02464-057 v out = 2v p-p figure 56. ad8129 second harmonic distortion vs. frequency frequency (mhz) hd3 (dbc) 1 ?42 ?48 ?54 ?60 ?66 ?72 ?78 ?84 10 40 v s = 2.5v ?90 g = +20 g = +10 v out = 1v p-p 02464-058 v out = 2v p-p figure 57. ad8129 third harmonic distortion vs. frequency v out (v p-p) ?50 0 ?56 ?62 ?68 ?74 ?80 ?86 0.5 1.0 1.5 2.0 2.5 3.0 v s = 2.5v f c = 5mhz g = +10 hd3 hd (dbc) 02464-059 g = +20 hd3 g = +10 hd2 g = +20 hd2 figure 58. ad8129 harmonic distortion vs. output voltage 02464-060 ?87 ?81 ?75 ?69 ?63 ?57 v cm (v) distortion (dbc) ?51 ?45 ?39 ?5 ?4 ?3 ?2 ?1 0 1 2 34 5 hd2 hd3 g = +1 v out = 2v p-p v s = 5v r l = 1k f c = 5mhz figure 59. ad8130 harmonic distortion vs. common-mode voltage 02464-061 ?97 ?91 ?85 ?79 ?73 ?67 r l ( ) distortion (dbc) ?61 100 1 k g = +1 f c = 5mhz v out = 1v p-p v s = 5v v s = 2.5v hd2 hd3 v s = 12v hd3 hd3 v s = 5v, 12v hd2 v s = 2.5v figure 60. ad8130 harmonic distortion vs. load resistance 02464-062 ?86 ?80 ?74 ?68 ?62 ?56 r l ( ) distortion (dbc) ?50 100 1 k g = +1 f c = 5mhz v out = 2v p-p hd2 v s = 2.5v v s = 5v, 12v hd2 v s = 2.5v hd3 v s = 5v, 12v hd3 figure 61. ad8130 harmonic distortion vs. load resistance
ad8129/ad8130 rev. c | page 20 of 40 02464-063 ?78 ?72 ?66 ?60 ?54 ?48 v cm (v) distortion (dbc) ?42 ?36 ?5 ?4 ?3 ?2 ?1 0 1 2 3 4 5 hd3 hd2 g = +10 v out = 2v p-p v s = 5v r l = 1k f c = 5mhz figure 62. ad8129 harmonic distortion vs. common-mode voltage 02464-064 ?90 ?84 ?78 ?72 ?68 ?60 r l ( ) distortion (dbc) ?54 100 1 k hd3 v s = 2.5v ?48 g = +10 f c = 5mhz v out = 1v p-p v s = 2.5v v s = 12v v s = 12v v s = 5v v s = 5v hd2 figure 63. ad8129 harmonic distortion vs. load resistance 02464-065 ?80 ?74 ?68 ?62 ?56 ?50 r l ( ) distortion (dbc) ?44 100 1 k hd3 g = +10 f c = 5mhz v out = 2v p-p v s = 2.5v v s = 12v v s = 5v v s = 2.5v v s = 12v v s = 5v figure 64. ad8129 harmonic distortion vs. load resistance 02464-066 v cm 200 1:2 1 2 1 0 20 r f gr g 0 499 2k 2k ? 499 221 105 mini-circuits ? : # t4-6t, f c 10mhz # tc4-1w, f c > 10mhz r g r f r l r l c l figure 65. ad8129/ad8130 basic distortion test circuit, v cm = 0 v, unless otherwise noted 02464-067 0.1 1.0 10 frequency (hz) 100 10 100k 100 1k 10k 1m 10m current noise (pa/ hz) figure 66. ad8129/ad8130 input current noise vs. frequency 02464-068 1 10 frequency (hz) 100 current noise (nv/ hz) 10 100k 100 1k 10k 1m 10m ad8130 ad8129 figure 67. ad8129/ad8130 input voltage noise vs. frequency
ad8129/ad8130 rev. c | page 21 of 40 frequency (hz) common-mode rejection (db) ?30 10k 100m 100k 1m 10m ?40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 ?120 v s = 5v, 12v 02464-069 v s = 2.5v figure 68. ad8130 common-mode rejection vs. frequency frequency (hz) power supply rejection (db) 0 1k ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 10k 100k 1m 10m 100m v s = 2.5v 02464-070 v s = 5v v s = 12v figure 69. ad8130 positive power supply rejection vs. frequency frequency (hz) power supply rejection (db) 0 1k ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 10k 100k 1m 10m 100m v s = 12v 02464-071 v s = 5v v s = 2.5v figure 70. ad8130 negative power supply rejection vs. frequency frequency (hz) common-mode rejection (db) ?30 10k 100m 100k 1m 10m ?40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 ?120 v s = 5v, 12v v s = 2.5v 02464-072 figure 71. ad8139 common-mode rejection vs. frequency frequency (hz) power supply rejection (db) 0 1k ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 10k 100k 1m 10m 100m 02464-073 v s = 12v v s = 5v v s = 2.5v figure 72. ad8129 positive power supply rejection vs. frequency frequency (hz) power supply rejection (db) 0 1k ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 10k 100k 1m 10m 100m v s = 5v v s = 2.5v 02464-074 v s = 12v figure 73. ad8129 negative power supply rejection vs. frequency
ad8129/ad8130 rev. c | page 22 of 40 frequency (hz) open-loop gain (db) 80 1k 70 60 50 40 30 20 10 0 ?10 10k 100k 1m 10m 100m 300m 180 135 90 45 0 phase margin (degrees) m = 58 2pf + ? + ? phase gain 02464-075 1k v out 100 v in 1k figure 74. ad8130 open-loop gain and phase vs. frequency frequency (hz) open-loop gain (db) 80 1k 70 60 50 40 30 20 10 0 90 10k 100k 1m 10m 100m 300m 180 135 90 45 0 phase margin (degrees) 2pf 1k v out 100 v in 1k phase gain 02464-076 m = 56 figure 75. ad8129 open-loop gain and phase vs. frequency frequency (hz) output impedance ( ) 100 1k 10 1 100m 10m 1m 10k 100k 1m 10m 100m ad8130, g = +1 ad8129, g = +10 v s = 5v 02464-077 figure 76. closed-loop outp ut impedance vs. frequency
ad8129/ad8130 rev. c | page 23 of 40 ad8130 transient response characteristics g = +1, r l = 1 k, c l = 2 pf, v s = 5 v, t a = 25c, unless otherwise noted. 02464-078 5.00ns 250mv v out = 1v p-p v s = 2.5v figure 77. ad8130 transient response, v s = 2.5 v, v out = 1 v p-p 02464-079 5.00ns 250mv v out = 1v p-p v s = 5v figure 78. ad8130 transient response, v s = 5 v, v out = 1 v p-p 02464-080 5.00ns 250mv v out = 1v p-p v s = 12v figure 79. ad8130 transient response, v s = 12 v, v out = 1 v p-p 02464-081 5.00ns 50mv v out = 0.2v p-p v s = 2.5v v s = 12v v s = 5v figure 80. ad8130 transient response vs. supply, v out = 0.2 v p-p 02464-082 v out = 1v p-p c l = 5pf v s = 2.5v v s = 5v v s = 12v 5.00ns 250mv figure 81. ad8130 transient response vs. supply, v out = 1 v p-p, c l = 5 pf 02464-083 5.00ns 500mv v s = 2.5v v s = 12v v s = 5v v out = 2v p-p c l = 5pf figure 82. ad8130 transient response vs. supply, v out = 2 v p-p, c l = 5 pf
ad8129/ad8130 rev. c | page 24 of 40 02464-084 10.00ns 50mv v out = 0.2 v p-p c l = 10pf c l = 5pf c l = 2pf figure 83. ad8130 transient response vs. load capacitance, v out = 0.2 v p-p 02464-085 5.00ns 500mv 0.5v p-p 2v p-p 1v p-p figure 84. ad8130 transient response vs. output amplitude, v out = 0.5 v p-p, 1 v p-p, 2 v p-p 02464-086 5.00ns 1.00v 1v p-p 2v p-p 4v p-p figure 85. ad8130 transient response vs. output amplitude, v out = 1 v p-p, 2 v p-p, 4 v p-p 250mv 5.00ns v out = 1v p-p g = +2 v s = 5v, c l = 10pf 02464-087 v s = 5v, c l = 2pf figure 86. ad8130 transient response vs. load capacitance, v out = 1 v p-p, g = +2 500mv 5.00ns 02464-088 v out = 2v p-p g = +2 v s = 5v v s = 12v figure 87. ad8130 transient response vs. supply, v out = 2 v p-p, g = +2 2.00v 5.00ns 02464-089 v out = 8v p-p c l = 10pf c l = 2pf g = +2 v s = 5v figure 88. ad8130 transient response vs. load capacitance, v out = 8 v p-p
ad8129/ad8130 rev. c | page 25 of 40 1.00v 10.0ns 4v p-p 2v p-p 1v p-p 02464-093 g = +5 v s = 5v c l = 10pf 1.00v 5.00ns v out v in 02464-090 figure 89. ad8130 transient response with +3 v common-mode input figure 92. ad8130 transient response vs. output amplitude 2.00v 10.0ns v out = 8v p-p 02464-094 g = +5 v s = 5v c l = 10pf 1.00v 5.00ns v out v in 02464-091 figure 90. ad8130 transient response with ?3 v common-mode input figure 93. ad8130 transient response, v out = 8 v p-p, g = +5, v s = 5 v 2.50v 5.00ns g = +2 v s = 12v v out = 10v p-p 02464-092 5.00v 10.0ns v out = 20v p-p 02464-095 g = +5 v s = 12v c l = 10pf figure 94. ad8130 transient response, v out = 20 v p-p, g = +5, v s = 12 v figure 91. ad8130 transient response, v out = 10 v p-p, g = +2, v s = 12 v
ad8129/ad8130 rev. c | page 26 of 40 ad8129 transient response characteristics g = +10, r f = 2 k, r g = 221 , r l = 1 k, c l = 1 pf, v s = 5 v, t a = 25c, unless otherwise noted. 250mv 5.00ns v out = 1v p-p v s = 2.5v 02464-096 figure 95. ad8129 transient response, v s = 2.5 v, v out = 1 v p-p 250mv 5.00ns v out = 1v p-p v s = 5v 02464-097 figure 96. ad8129 transient response, v s = 5 v, v out = 1 v p-p 250mv 5.00ns 02464-098 v out = 1v p-p v s = 12v figure 97. ad8129 transient response, v s = 12 v, v out = 1 v p-p 100mv 5.00ns v out = 0.4v p-p v s = 2.5v v s = 5v v s = 12v 02464-099 figure 98. ad8129 transient response vs. supply, v out = 0.4 v p-p 250mv 5.00ns v out = 1v p-p c l = 5pf v s = 2.5v v s = 5v v s = 12v 02464-100 figure 99. ad8129 transient response vs. supply, v out = 1 v p-p, c l = 5 pf 02464-101 250mv 5.00ns v out = 2v p-p c l = 5pf v s = 5v v s = 2.5v v s = 12v figure 100. ad8129 transient response vs. supply, v out = 2 v p-p, c l = 5 pf
ad8129/ad8130 rev. c | page 27 of 40 100mv 5.00ns v out = 0.4v p-p c l = 10pf c l = 5pf c l = 2pf 02464-102 figure 101 transient response vs. load capacitance, v out = 0.4 v p-p 500mv 5.00ns v o = 2v p-p v o = 1v p-p v o = 0.5v p-p 02464-103 figure 102. transient response vs. output amplitude, v out = 0.5 v p-p, 1 v p-p, 2 v p-p 1.00v 5.00ns v o = 4v p-p v o = 2v p-p v o = 1v p-p 02464-104 figure 103. transient response vs. output amplitude, v out = 1 v p-p, 2 v p-p, 4 v p-p 250mv 5.00ns g = +20 c l = 20pf v out = 1v p-p 02464-105 figure 104. ad8129 transient response, v out = 1 v p-p, v s = 2.5 v to 12 v 500mv 5.00ns g = +20 c l = 20pf v out = 2v p-p 02464-106 figure 105. ad8129 transient response, v out = 2 v p-p, v s = 5 v 2.00v 5.00ns g = +20 c l = 20pf 02464-107 v out = 8v p-p figure 106. ad8129 transient response, v out = 8 v p-p, v s = 5 v
ad8129/ad8130 rev. c | page 28 of 40 1.00v 5.00ns v in v out 02464-108 figure 107. ad8129 transient response with +3.5 v common-mode input v out v in 02464-109 figure 108. ad8129 transient response with ?3.5 v common-mode input 2.50v 5.00ns g = +20 v s = 12v c l = 20pf v out = 10v p-p 02464-110 figure 109. ad8129 transient response, v out = 10 v p-p, g = +20 1.00v 12.5ns 4v p-p 2v p-p 1v p-p 02464-111 g = +50 v s = 5v c l = 20pf figure 110. ad8129 transient response vs. output amplitude, v out = 1 v p-p, 2 v p-p, 4 v p-p 2.00v 12.5ns v out = 8v p-p 02464-112 g = +50 v s = 5v c l = 20pf figure 111. ad8129 transient response, v out = 8 v p-p, g = +50, v s = 5 v 5.00v 12.5ns v out = 20v p-p 02464-113 g = +50 v s = 12v c l = 10pf figure 112. ad8129 transient response, v out = 20 v p-p, g = +50, v s = 12 v
ad8129/ad8130 rev. c | page 29 of 40 g = +1 v s = 5v 23 20 17 14 11 ?5?4?3?2?1012345 differential input (v) supply current (ma) 02464-114 figure 113. ad8130 dc power supply current vs. differential input voltage 37 31 25 19 13 ?1.0 ?0.8 ?0.6 ?0.4 ?0.2 0 0.2 0.4 0.6 0.8 1.0 differential input (v) supply current (ma) 02464-115 g = +1 v s = 10v figure 114. ad8129 dc power supply current vs. differential input voltage temperature(c) differential input (v) 3.0 ?50 0 ?1.0 ?2.0 ?3.0 1.0 2.0 ?35 ?20 ?5 10 25 40 55 70 85 100 ad8130 ad8129 ad8130 v out = 100mv ac @ 1khz 02464-116 ad8129 figure 115. ad8129/ad8130 input differential voltage range vs. temperature, 1% gain compression g = +1 v s = 5v r l = 1k ?1.0 ?0.8 ?0.6 ?0.4 ?0.2 0 0.2 0.4 0.6 0.8 1.0 output voltage (v) gain nonlinearity (0.005%/div) 02464-117 figure 116. ad8130 gain nonlinearity, v out = 2 v p-p ?2.5 ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 2.5 output voltage (v) gain nonlinearity (0.08%/div) 02464-118 g = +1 v s = 5v r l = 1k figure 117. ad8130 gain nonlinearity, v out = 5 v p-p 4 2 0 ?2 ?4 ?5?4?3?2?1012345 differential input (v) v out ( v) 3 1 ?1 ?3 02464-119 v s = 5v figure 118. ad8130 differential input clipping level
ad8129/ad8130 rev. c | page 30 of 40 ?1.0 ?0.8 ?0.6 ?0.4 ?0.2 0 0.2 0.4 0.6 0.8 1.0 output voltage (v) gain nonlinearity (0.005%/div) 02464-120 g = +10 v s = 5v r l = 1k figure 119. ad8129 gain nonlinearity, v out = 2 v p-p ?5 ?4 ?3 ?2 ?1 0 1 2 3 4 5 output voltage (v) gain nonlinearity (0.2%/div) 02464-121 g = +10 v s = 12v r l = 1k figure 120. ad8129 gain nonlinearity, v out = 10 v p-p 8 4 0 ?4 ?8 ?1.0 ?0.8 ?0.6 ?0.4 ?0.2 0 0.2 0.4 0.6 0.8 1.0 differential input (v) output voltage (v) 6 2 ?2 ?6 v s = 10v 02464-122 figure 121. ad8129 differential input clipping level total supply voltage (v) supply current (ma) 15 9 03 0 10 15 20 25 14 13 12 11 10 02464-123 5 figure 122. quiescent power supply current vs. total supply voltage temperature (c) supply current (ma) 17 ?50 16 15 14 13 12 11 10 9 8 7 ?35 ?20 ?5 10 25 40 55 70 85 100 v s = 2.5 02464-124 v s =5 v s = 12 115 125 figure 123. quiescent power supply current vs. temperature temperature (c) input bias current ( a) 0.60 0.15 ?50 0.45 0.30 ?35 ?20 ?5 10 25 40 55 70 85 100 input offset current (na) 40 10 30 20 i b i os 02464-125 figure 124. input bias current and input offset current vs. temperature
ad8129/ad8130 rev. c | page 31 of 40 v out = 100mv ac at 1khz 4.00 3.75 3.50 3.25 3.00 2.75 2.50 2.25 2.00 1.75 1.50 1.25 1.00 input common mode (v) ?50?35?20?5102540557085100 temperature (c) ad8130 ad8129 ad8130 ad8129 v s = 5v 02464-126 figure 125. common-mode voltage range vs. temperature, typical 1% gain compression temperature (c) input common mode (v) 4.00 ?50 3.75 3.50 3.25 3.00 2.75 ?3.00 ?3.25 ?3.50 ?3.75 ?4.00 ?35 ?20 ?5 10 25 40 55 70 85 100 ad8130 ad8129 ad8130 ad8129 02464-127 v s = 5v v out = 100mv ac at 1khz figure 126. common-mode voltage range vs. temperature, typical 1% gain compression temperature (c) input common mode (v) 11.0 ?50 10.5 10.0 9.5 9.0 8.5 ?9.0 ?9.5 ?10.0 ?10.5 ?11.0 ?35 ?20 ?5 10 25 40 55 70 85 100 ad8130 ad8129 v s = 12v ad8130 ad8129 v out = 100mv ac at 1khz 02464-128 figure 127. common-mode voltage range vs. temperature, typical 1% gain compression output current (ma) output voltage (v) 4.0 0 3.5 3.0 2.0 1.5 1.0 5 10152025303540 sinking v s = 5v sourcing 02464-129 v out = 100mv ac at 1khz +25c ?40c +100c figure 128. output voltage range vs. output current, typical 1% gain compression output current (ma) output voltage (v) 4.0 0 3.5 3.0 ?3.0 ?3.5 ?4.0 40 02464-130 v s = 5v v out = 100mv ac at 1khz 5 101520253035 +25c ?40c +100c figure 129. output voltage range vs. output current, typical 1% gain compression output current (ma) 11 0 10 9 ?9 ?10 ?11 5 10152025303540 v s = 12v 02464-131 output voltage (v) +25c ?40c +100c figure 130. output voltage range vs. output current, typical 1% gain compression
ad8129/ad8130 rev. c | page 32 of 40 theory of operation the ad8129/ad8130 use an architecture called active feedback, which differs from that of conventional op amps. the most obvious differentiating feature is the presence of two separate pairs of differential inputs compared with a conventional op amps single pair. typically, for the active feedback architecture, one of these input pairs is driven by a differential input signal, while the other is used for the feedback. this active stage in the feedback path is where the term active feedback is derived. the active feedback architecture offers several advantages over a conventional op amp in many types of applications. among these are excellent common-mode rejection, wide input common-mode range, and a pair of inputs that are high impedance and completely balanced in a typical application. in addition, while an external feedback network establishes the gain response as in a conventional op amp, its separate path makes it completely independent of the signal input. this eliminates any interaction between the feedback and input circuits, which traditionally causes problems with cmrr in conventional differential-input op amp circuits. another advantage is the ability to change the polarity of the gain merely by switching the differential inputs. a high input- impedance inverting amplifier can be made. besides a high input impedance, a unity-gain inverter with the ad8130 has a noise gain of unity. this produces lower output noise and higher bandwidth than op amps that have noise gain equal to 2 for a unity-gain inverter. the two differential input stages of the ad8129/ad8130 are each transconductance stages that are well matched. these stages convert the respective differential input voltages to internal currents. the currents are then summed and converted to a voltage, which is buffered to drive the output. the compensation capacitor is in the summing circuit. when the feedback path is closed around the part, the output drives the feedback input to the voltage that causes the internal currents to sum to 0. this occurs when the two differential inputs are equal and opposite; that is, their algebraic sum is 0. in a closed-loop application, a conventional op amp has its differential input voltage driven to near 0 under nontransient conditions. the ad8129/ad8130 generally has differential input voltages at each of its input pairs, even under equilibrium conditions. as a practical consideration, it is necessary to limit the differential input voltage internally with a clamp circuit. therefore, the input dynamic ranges are limited to about 2.5 v for the ad8130 and 0.5 v for the ad8129 (see the ad8129/ad8130 specifications section for more detail). for this and other reasons, it is not recommended to reverse the input and feedback stages of the ad8129/ad8130, even though some apparently normal functi onality may be observed under some conditions. a few simple circuits can illustrate how the active feedback architecture of the ad8129/ad8130 operates. op amp configuration if only one of the input stages of the ad8129/ad8130 is used, it functions very much like a conventional op amp (see figure 131 ). classical inverting and noninverting op amps circuits can be created, and the basic governing equations are the same as for a conventional op amp. the unused input pins form the second input and should be shorted together and tied to ground or a midsupply voltage when they are not used. ?v s pd +v s + + r f r g ?v v out v in +v 6 2 5 4 8 1 37 0.1 f 10 f 0.1 f 10 f 02464-132 notes 1. this circuit is provided to demonstrate device operation. it is not recommended to use this circuit in place of an op amp. figure 131. with both inputs grounded, the feedback stage functions like an op amp: v out = v in (1 + r f /r g ). with the unused pair of inputs shorted, there is no differential voltage between them. this dictates that the differential input voltage of the used inputs is also 0 for closed-loop applications. because this is the governing principle of conventional op amp circuits, an active feedback amplifier can function as a conventional op amp under these conditions. note that this circuit is presented only for illustration purposes to show the similarities of the active feedback architecture functionality to conventional op amp functionality. if it is desired to design a circuit that can be created from a conven- tional op amp, it is recommended to choose a conventional op amp with specifications that are better suited to that application. these op amp principles are the basis for offsetting the output, as described in the output offset/level translator section.
ad8129/ad8130 rev. c | page 33 of 40 applications basic gain circuits the gain of the ad8129/ad8130 can be set with a pair of feedback resistors. the basic configuration is shown in figure 132 . the gain equation is the same as that of a conventional op amp: g = 1 + r f /r g . for unity-gain applications using the ad8130, r f can be set to 0 (short circuit), and r g can be removed (see figure 133 ). the ad8129 is compensated to operate at gains of 10 and higher; therefore, shorting the feedback path to obtain unity gain causes oscillation. r f r g ?v v out +v v in ?v s pd +v s + + ad8129/ ad8130 6 2 5 4 8 1 3 7 0.1 f 10 f 0.1 f 10 f 02464-133 figure 132. basic gain circuit: v out = v in (1 + r f /r g ) 0.1 f ?v v out +v 0.1 f 10 f v in ad8130 ?v s pd +v s + + 6 2 5 4 8 1 37 10 f 02464-134 figure 133. an ad8130 with unity gain the input signal can be applied either differentially or in a single-ended fashionall that matters is the magnitude of the differential signal between the two inputs. for single-ended input applications, applying the signal to the +in with ?in grounded creates a noninverting gain, while reversing these connections creates an inverting gain. because the two inputs are high impedance and matched, both of these conditions provide the same high input impedance. thus, an advantage of the active feedback architecture is the ability to make a high input impedance inverting op amp. if conventional op amps are used, a high impedance buffer followed by an inverting stage is needed. this requires two op amps. twisted-pair cable, composite video receiver with equalization using an ad8130 the ad8130 has excellent common-mode rejection at its inputs. this makes it an ideal candidate for a receiver for signals that are transmitted over long distances on twisted-pair cables. category 5 cables are very common in office settings and are extensively used for data transmission. these cables can also be used for the analog transmission of signals such as video. these long cables pick up noise from the environment they pass through. this noise does not favor one conductor over another and therefore is a common-mode signal. a receiver that rejects the common-mode signal on the cable can greatly enhance the signal-to-noise ratio performance of the link. the ad8130 is also very easy to use as a differential receiver, because the differential inputs and the feedback inputs are entirely separate. this means that there is no interaction between the feedback network and the termination network, as there would be in conventional op amp types of receivers. another issue with long cables is that there is more attenuation of the signal at longer distances. attenuation is also a function of frequency; it increases to roughly the square root of frequency. for good fidelity of video circuits, the overall frequency response of the transmission channel should be flat vs. frequency. because the cable attenuates the high frequencies, a frequency-selective boost circuit can be used to undo this effect. these circuits are called equalizers. an equalizer uses frequency-dependent elements (ls and cs) to create a frequency response that is the opposite of the rest of the channels response to create an overall flat response. there are many ways to create such circuits, but a common technique is to put the frequency-selective elements in the feedback path of an op amp circuit. the ad8130 in particular makes this easier than other circuits, because, once again, the feedback path is completely independent of the input path and there is no interaction. the circuit in figure 134 was developed as a receiver/equalizer for transmitting composite video over 300 meters of category 5 cable. this cable has an attenuation of approximately 20 db at 10 mhz for 300 meters. at 100 mhz, the attenuation is approximately 60 db (see figure 135 ).
ad8129/ad8130 rev. c | page 34 of 40 r f 1k 0.1 f 10 f ?v v out +v 0.1 f 10 f v in r1 100 r g 499 ?v s pd +v s + + c1 2 00pf ad8130 100 6 2 5 4 8 1 37 02464-135 figure 134. an equalizer circuit for composite video transmissions over 300 meters of category-5 cable 20 10 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 frequency (hz) i/o response 0 10k 100k 1m 10m 100m 02464-136 figure 135. transmission response of 300 meters of category-5 cable the feedback network is between pin 6 and pin 5 and from pin 5 to ground. c1 and r f create a corner frequency of about 800 khz. the gain increases to provide about 15 db of boost at 8 mhz. the response of this circuit is shown in figure 136 . 20 10 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 frequency (hz) i/o response 0 10k 100k 1m 10m 100m 02464-137 figure 136. frequency response of equalizer circuit it is difficult to calculate the exact component values via strictly mathematical means, because the equations for the cable attenuation are approximate and have functions that are not simply related to the responses of rc networks. the method used in this design was to approximate the required response via graphical means from the frequency response and then select components that would approximate this response. the circuit was then built, measured, and finally adjusted to obtain an acceptable responsein this case, flat to 9 mhz to within approximately 1 db (see figure 137 ). 20 10 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 frequency (hz) i/o response 0 10k 100k 1m 10m 100m 02464-138 figure 137. combined response of cable plus equalizer output offset/level translator the circuit in figure 133 has the reference input (pin 4) tied to ground, which produces a ground-referenced output signal. if it is desired to offset the output voltage from ground, the ref input can be used (see figure 138 ). the level v offset appears at the output with unity gain. 0.1 f ?v v out = v in +v offset +v 0.1 f 10 f v in v offset ?v s pd +v s + + ad8130 10 f 6 2 5 4 8 1 37 02464-139 figure 138. the voltage applied to pin 4 to the unity-gain output voltage produced by v in if the circuit has a gain higher than unity, the gain must be factored in. if r g is connected to ground, the voltage applied to ref is multiplied by the gain of the circuit and appears at the outputjust like a noninverting conventional op amp. this situation is not always desirable; the user may want v offset to appear at the output with unity gain.
ad8129/ad8130 rev. c | page 35 of 40 one way to accomplish this is to drive both ref and r g with the desired offset signal (see figure 139 ). superposition can be used to solve this circuit. first, break the connection between v offset and r g . with r g grounded, the gain from pin 4 to v out is 1 + r f /r g . with pin 4 grounded, the gain though r g to v out is ?r f /r g . the sum of these is 1. if v ref is delivered from a low impedance source, this works fine. however, if the delivered offset voltage is derived from a high impedance source, such as a voltage divider, its impedance affects the gain equation. this makes the circuit more complicated because it creates an interaction between the gain and offset voltage. v out = v in (1 + r f /r g )+v offset ?v +v v in v offset ?v s pd +v s + + r f r g ad8129/ ad8130 6 2 5 4 8 1 37 0.1 f 10 f 0.1 f 10 f 02464-140 figure 139. in this circuit, v offset appears at the output with unity gain. this circuit works well if the v offset source impedance is low. a way around this is to apply the offset voltage to a voltage divider whose attenuation factor matches the gain of the amplifier and then apply this voltage to the high impedance ref input. this circuit first divides the desired offset voltage by the gain, and the amplifier multiplies it back up to unity (see figure 140 ). v out = v in (1 + r f /r g )+v offset ?v +v v in ?v s pd +v s + + r f r g r g v offset r f ad8129/ ad8130 6 2 5 4 8 1 37 0.1 f 10 f 0.1 f 10 f 02464-141 figure 140. adding an attenuator at the offset input causes it to appear at the output with unity gain. resistorless gain of 2 the voltage applied to the ref input (pin 4) can also be a high bandwidth signal. if a unity-gain ad8130 has both +in and ref driven with the same signal, there is unity gain from v in and unity gain from v ref . thus, the circuit has a gain of 2 and requires no resistors (see figure 141 ). v out ?v +v v in ?v s pd +v s + + ad8130 6 2 5 4 8 1 37 0.1 f 10 f 0.1 f10 f 02464-142 figure 141. gain-of-2 conne ctions with no resistors summer a general summing circuit can be made by the previous technique. a unity-gain configured ad8130 has one signal applied to +in, while the other signal is applied to ref. the output is the sum of the two input signals (see figure 142 ). v out = v1 + v2 v1 v2 ?v +v ?v s +v s + + ad8130 6 2 5 4 8 1 37 0.1 f 10 f 0.1 f10 f 02464-143 pd figure 142. a summing circuit that is noninverting with high input impedance this circuit offers several advantages over a conventional op amp inverting summing circuit. first, the inputs are both high impedance and the circuit is noninverting. it would require significant additional circuitry to make an op amp summing circuit that has high input impedance and is noninverting. another advantage is that the ad8130 circuit still preserves the full bandwidth of the part. in a conventional summing circuit, the noise gain is increased for each additional input, so the bandwidth response decreases accordingly. by this technique, four signals can be summed by applying them to two ad8130s and then summing the two outputs by a third ad8130. cable-tap amplifier it is often desirable to have a video signal drive several pieces of equipment. however, the cable should only be terminated once at its endpoint; therefore, it is not appropriate to have a termination at each device. a loop-through connection allows a device to tap the video signal while not disturbing it by any excessive loading.
ad8129/ad8130 rev. c | page 36 of 40 such a connection, also referred to as a cable-tap amplifier, can be simply made with an ad8130 (see figure 143 ). the circuit is configured with unity gain, and if no output offset is desired, the ref pin is grounded. the negative differential input is connected directly to the shield of the cable (or an associated connector) at the point at which it wants to be tapped. 75 75 video in v out ?v +v ?v s pd +v s + + ad8130 6 2 5 4 8 1 37 0.1 f 10 f 0.1 f10 f 02464-144 figure 143. the ad8130 can tap the video signal at any point along the cable without loading the signal. the center conductor connects to the positive differential input of the ad8130. the amplitude of the video signal at this point is unity, because it is between the two termination resistors. the ad8130 provides a high impedance to this signal so that the signal is not disturbed. a buffered unity-gain version of the video signal appears at the output. power-down the ad8129/ad8130 have a power-down pin that can be used to lower the quiescent current when the amplifier is not being used. a logic low level on the pd pin causes the part to power down. because there is no ground pin on the ad8129/ad8130, there is no logic reference to interface to standard logic levels. for this reason, the reference level for the pd input is v s . if the ad8129/ad8130 are run with v s = 5 v, there is direct compatibility with logic families. however, if v s is higher than this, a level-shift circuit is needed to interface to conventional logic levels. a simple level-shifting circuit that is compatible with common logic families is presented in figure 144 . ad8129/ ad8130 7 +v s +v s 3 pd 1k 4.99k low = power-down 2n2222 or eq 02464-145 figure 144. circuit that sh ifts the logic level when v s is not equal to approximately 5 v. extreme operatin g conditions the ad8129/ad8130 are designed to provide high performance over a wide range of supply voltages. however, there are some extremes of operating conditions that have been observed to produce suboptimal results. one of these conditions occurs when the ad8130 is operated at unity gain with low supply voltageless than approximately 4 v. at unity gain, the output drives fb directly. with supplies of v s less than approximately 4 v at unity gain, the output can drive fbs voltage too close to the rail for the circuit to stay properly biased. this can lead to a parasitic oscillation. a way to prevent this is to limit the input signal swing with clamp diodes. common silicon-junction signal diodes like the 1n4148 have a forward bias of approximately 0.7 v when about 1 ma of current flows through them. two series pairs of such diodes connected antiparallel across the differential inputs can be used to clamp the input signal and prevent this condition. it should be noted that the ref input can also shift the output signal; therefore, this technique only works when ref is at ground or close to it (see figure 145 ). ad8130 v out ?v +v ?v s pd +v s + + v in 1n4148 v in 6 2 5 4 8 1 3 7 0.1 f 10 f 0.1 f10 f 02464-146 figure 145. clamping diodes at the input limits the input swing amplitude
ad8129/ad8130 rev. c | page 37 of 40 another problem can occur with the ad8129 operating at a supply voltage of greater than or equal to 12 v. the architecture causes the supply current to increase as the input differential voltage increases. if the ad8129 differential inputs are overdriven too far, excessive current can flow into the device and potentially cause permanent damage. a practical means to prevent this from occurring is to clamp the inputs differentially with a pair of antiparallel schottky diodes (see figure 146 ). these diodes have a lower forward voltage of approximately 0.4 v. if the differential voltage across the inputs is restricted to these conditions, no excess current is drawn by the ad8129 under these operating conditions. if the supply voltage is restricted to less than 11 v, the internal clamping circuit limits the differential voltage and excessive supply current is not drawn. the external clamp circuit is not needed. v in agilent hsms 2822 1 2 3 v out ?v +v ?v s pd +v s + + v in ad8129 6 2 5 4 8 1 3 7 0.1 f 10 f 0.1 f10 f 02464-147 figure 146. schottky diodes across the inputs limits the input differential voltage in both circuits, the input series resistors function to limit the current through the diodes when they are forward biased. as a practical matter, these resistors must be matched so that the cmrr is preserved at high frequencies. these resistors have minimal effect on the cmrr at low frequency. power dissipation the ad8129/ad8130 can operate with supply voltages from +5 v to 12 v. the major reason for such a wide supply range is to provide a wide input common-mode range for systems that can require this. this would be encountered when significant common-mode noise couples into the input path. for applications that do not require a wide dynamic range for the input or output, it is recommended to operate with lower supply voltages. the ad8129/ad8130 is also available in a very small 8-lead msop package. this package has higher thermal impedance than larger packages and operates at a higher temperature with the same amount of power dissipation. certain operating conditions that are within the specifications range of the parts can cause excess power dissipation. caution should be exercised. the power dissipation is a function of several operating conditions, including the supply voltage, the input differential voltage, the output load, and the signal frequency. a basic starting point is to calculate the quiescent power dissipation with no signal and no differential input voltage. this is just the product of the total supply voltage and the quiescent operating current. the maximum operating supply voltage is 26.4 v, and the quiescent current is 13 ma. this causes a quiescent power dissipation of 343 mw. for the msop package, the ja specification is 142c/w. therefore, the quiescent power causes about a 49c rise above ambient in the msop package. the current consumption is also a function of the differential input voltage (see figure 113 and figure 114 ). this current should be added onto the quiescent current and then multiplied by the total supply voltage to calculate the power. the ad8129/ad8130 can directly drive loads of as low as 100 , such as a terminated 50 cable. the worst-case power dissipation in the output stage occurs when the output is at midsupply. as an example, for a 12 v supply with the output driving a 250 load to ground, the maximum power dissipation in the output occurs when the output voltage is 6 v. the load current is 6 v/250 = 24 ma. this same current flows through the output across a 6 v drop from v s . it dissipates 144 mw. for the 8-lead msop package, this causes a temperature rise of 20c above ambient. although this is a worst-case number, it is apparent that this can be a considerable additional amount of power dissipation. several changes can be made to alleviate this. one is to use the standard 8-lead soic package. this lowers the thermal impedance to 121c/w, which is a 15% improvement. another is to use a lower supply voltage unless absolutely necessary. finally, do not use the ad8129/ad8130 when it is operating on high supply voltages to directly drive a heavy load. it is best to use a second op amp after the output stage. some of the gain can be shifted to this stage so that the signal swing at the output of the ad8129/ad8130 is not too large.
ad8129/ad8130 rev. c | page 38 of 40 layout, grounding, and bypassing the ad8129/ad8130 are very high speed parts that can be sensitive to the pcb environment in which they operate. realizing their superior specifications requires attention to various details of standard high speed pcb design practice. the first requirement is for a good solid ground plane that covers as much of the board area around the ad8129/ad8130 as possible. the only exception to this is that the ground plane around the fb pin should be kept a few millimeters away, and the ground should be removed from the inner layers and the opposite side of the board under this pin. this minimizes the stray capacitance on this node and helps preserve the gain flatness vs. frequency. the power supply pins should be bypassed as close as possible to the device to the nearby ground plane. good high frequency ceramic chip capacitors should be used, and the bypassing should be done with a capacitance value of 0.01 f to 0.1 f for each supply. farther away, low frequency bypassing should be provided with 10 f tantalum capacitors from each supply to ground. the signal routing should be short and direct to avoid parasitic effects. where possible, signals should be run over ground planes to avoid radiating or to avoid being susceptible to other radiation sources.
ad8129/ad8130 rev. c | page 39 of 40 outline dimensions 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa figure 147. 8-lead standard small outline package [soic] narrow body (r-8) dimensions shown in millimeters and (inches) compliant to jedec standards mo-187-aa 0.80 0.60 0.40 8 0 4 8 1 5 pin 1 0.65 bsc seating plane 0.38 0.22 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.08 3.20 3.00 2.80 5.15 4.90 4.65 0.15 0.00 0.95 0.85 0.75 figure 148. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters
ad8129/ad8130 rev. c | page 40 of 40 ordering guide model temperature range 1 package description package option branding ad8129ar ?40c to +85c 8-lead soic r-8 ad8129ar-reel ?40c to +85c 8-lead soic, 13" tape and reel r-8 ad8129ar-reel7 ?40c to +85c 8-lead soic, 7" tape and reel r-8 ad8129arz 2 ?40c to +85c 8-lead soic r-8 ad8129arz-reel 2 ?40c to +85c 8-lead soic, 13" tape and reel r-8 ad8129arz-reel7 2 ?40c to +85c 8-lead soic, 7" tape and reel r-8 ad8129arm ?40c to +85c 8-lead msop rm-8 hqa ad8129arm-reel ?40c to +85c 8-lead msop, 13" tape and reel rm-8 hqa ad8129arm-reel7 ?40c to +85c 8-lead msop, 7" tape and reel rm-8 hqa ad8129armz 2 ?40c to +85c 8-lead msop rm-8 hqa# ad8129armz-reel 2 ?40c to +85c 8-lead msop, 13" tape and reel rm-8 hqa# ad8129armz-reel7 2 ?40c to +85c 8-lead msop, 7" tape and reel rm-8 hqa# ad8130ar ?40c to +85c 8-lead soic r-8 ad8130ar-reel ?40c to +85c 8-lead soic, 13" tape and reel r-8 ad8130ar-reel7 ?40c to +85c 8-lead soic, 7" tape and reel r-8 ad8130arz 2 ?40c to +85c 8-lead soic r-8 ad8130arz-reel 2 ?40c to +85c 8-lead soic, 13" tape and reel r-8 ad8130arz-reel7 2 ?40c to +85c 8-lead soic, 7" tape and reel r-8 ad8130arm ?40c to +85c 8-lead msop rm-8 hpa ad8130arm-reel ?40c to +85c 8-lead msop, 13" tape and reel rm-8 hpa ad8130arm-reel7 ?40c to +85c 8-lead msop, 7" tape and reel rm-8 hpa ad8130armz 2 ?40c to +85c 8-lead msop rm-8 hpa# ad8130armz-reel 2 ?40c to +85c 8-lead msop, 13" tape and reel rm-8 hpa# ad8130armz-reel7 2 ?40c to +85c 8-lead msop, 7" tape and reel rm-8 hpa# 1 operating temperature range for 5 v or +5 v operation is ?40c to +125c. 2 z = pb-free part; # indicates lead-free, may be top or bottom marked. ? 2005 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. c02464C0C11/05(c)

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